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1 Ergebnisse
1
A technique for selecting CMOS transistor orders:
, In:
2007 25th International Conference on Computer Design
,
Chiang, Ting-Wei
;
Chen, C. Y. Roger
;
Chen, Wei-Yu
- p. None , 2007
Link:
https://doi.org/10.1109/ICCD.2007.4601936
RT T1
2007 25th International Conference on Computer Design
: T1
A technique for selecting CMOS transistor orders
UL https://suche.suub.uni-bremen.de/peid=ieee-4601936&Exemplar=1&LAN=DE A1 Chiang, Ting-Wei A1 Chen, C. Y. Roger A1 Chen, Wei-Yu YR 2007 SN 1063-6404 K1 Transistors K1 Delays K1 Logic gates K1 Capacitors K1 Integrated circuit modeling K1 Capacitance K1 Equivalent circuits SP None LK http://dx.doi.org/https://doi.org/10.1109/ICCD.2007.4601936 DO https://doi.org/10.1109/ICCD.2007.4601936 SF ELIB - SuUB Bremen
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