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1 Ergebnisse
1
A 40nm 16-core 128-thread CMT SPARC SoC processor:
, In:
2010 IEEE International Solid-State Circuits Conference - (ISSCC)
,
Shin, Jinuk Luke
;
Tam, Kenway
;
Huang, Dawei
... - p. None , 2010
Link:
https://doi.org/10.1109/ISSCC.2010.5434030
RT T1 <cTitle>2010 IEEE International Solid-State Circuits Conference - (ISSCC)</cTitle>: T1 <Title>A 40nm 16-core 128-thread CMT SPARC SoC processor</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-5434030&Exemplar=1&LAN=DE A1 Shin, Jinuk Luke A1 Tam, Kenway A1 Huang, Dawei A1 Petrick, Bruce A1 Pham, Ha A1 Hwang, Changku A1 Li, Hongping A1 Smith, Alan A1 Johnson, Timothy A1 Schumacher, Francis A1 Greenhill, David A1 Leon, Ana Sonia A1 Strong, Allan YR 2010 SN 2376-8606 SN 0193-6530 SN 0193-6530 K1 Clocks K1 Bandwidth K1 Decision feedback equalizers K1 Random access memory K1 Integrated circuit interconnections K1 Logic testing K1 Phase locked loops SP None LK http://dx.doi.org/https://doi.org/10.1109/ISSCC.2010.5434030 DO https://doi.org/10.1109/ISSCC.2010.5434030 SF ELIB - SuUB Bremen
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