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A 13ns/350mW 2Kw × 9b RAM using Hi-BiCMOS Technology:
, In:
ESSCIRC '86: Twelfth European Solid-State Circuits Conference
,
Miwa, Hideo
;
Yamauchi, Koudo
;
Odaka, Masanori
... - p. 41-43 , 1986
Link:
https://doi.org/10.1109/ESSCIRC.1986.5468273
RT T1 <cTitle>ESSCIRC '86: Twelfth European Solid-State Circuits Conference</cTitle>: T1 <Title>A 13ns/350mW 2Kw × 9b RAM using Hi-BiCMOS Technology</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-5468273&Exemplar=1&LAN=DE A1 Miwa, Hideo A1 Yamauchi, Koudo A1 Odaka, Masanori A1 Ogiue, Katsumi A1 Ide, Akira A1 Yamamura, Masahiro YR 1986 K1 Read-write memory K1 Power dissipation K1 CMOS technology K1 Delay effects K1 Voltage K1 Bipolar transistors K1 Decoding K1 Driver circuits K1 Capacitance K1 High power amplifiers SP 41 OP 43 LK http://dx.doi.org/https://doi.org/10.1109/ESSCIRC.1986.5468273 DO https://doi.org/10.1109/ESSCIRC.1986.5468273 SF ELIB - SuUB Bremen
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