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An experimental 2T cell RAM with 7 ns access time at low te..:
, In:
Digest of Technical Papers., 1990 Symposium on VLSI Circuits
,
Blalock, T.N.
;
Jaeger, R.C.
- p. None , 1990
Link:
https://doi.org/10.1109/VLSIC.1990.111074
RT T1 <cTitle>Digest of Technical Papers., 1990 Symposium on VLSI Circuits</cTitle>: T1 <Title>An experimental 2T cell RAM with 7 ns access time at low temperature</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-5727508&Exemplar=1&LAN=DE A1 Blalock, T.N. A1 Jaeger, R.C. YR 1990 K1 Random access memory K1 Temperature measurement K1 Capacitance K1 Temperature sensors K1 Power demand K1 Logic gates K1 Voltage SP None LK http://dx.doi.org/https://doi.org/10.1109/VLSIC.1990.111074 DO https://doi.org/10.1109/VLSIC.1990.111074 SF ELIB - SuUB Bremen
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