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Modeling of multi-level inductor fabricated on silicon subs..:
, In:
ASIC, 2003. Proceedings. 5th International Conference on
,
Yong-Zhong Xiong, Yong-Zhong Xiong
;
Rustagi, S.C.
- p. None , 2003
Link:
https://doi.org/10.1109/ICASIC.2003.1277402
RT T1
ASIC, 2003. Proceedings. 5th International Conference on
: T1
Modeling of multi-level inductor fabricated on silicon substrate
UL https://suche.suub.uni-bremen.de/peid=ieee-5733590&Exemplar=1&LAN=DE A1 Yong-Zhong Xiong, Yong-Zhong Xiong A1 Rustagi, S.C. YR 2003 SN 1523-553X K1 S-parameters K1 circuit optimisation K1 inductors K1 semiconductor device models K1 silicon K1 substrates K1 S-parameter K1 conceptual physical model K1 design optimization K1 extracted model K1 inter-metal capacitance K1 metal layers K1 metal spirals K1 multilevel inductor K1 multilevel spiral inductors K1 multimetal inductor design K1 mutual inductance K1 silicon substrate SP None LK http://dx.doi.org/https://doi.org/10.1109/ICASIC.2003.1277402 DO https://doi.org/10.1109/ICASIC.2003.1277402 SF ELIB - SuUB Bremen
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