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1 Ergebnisse
1
Architecture of a post-OPC silicon verification tool:
, In:
ASIC, 2003. Proceedings. 5th International Conference on
,
Xiaolang Yan, Xiaolang Yan
;
Ye Chen, Ye Chen
;
Zheng Shi, Zheng Shi
. - p. None , 2003
Link:
https://doi.org/10.1109/ICASIC.2003.1277471
RT T1
ASIC, 2003. Proceedings. 5th International Conference on
: T1
Architecture of a post-OPC silicon verification tool
UL https://suche.suub.uni-bremen.de/peid=ieee-5733658&Exemplar=1&LAN=DE A1 Xiaolang Yan, Xiaolang Yan A1 Ye Chen, Ye Chen A1 Zheng Shi, Zheng Shi A1 Zhijin Chen, Zhijin Chen YR 2003 SN 1523-553X K1 integrated circuit layout K1 integrated circuit manufacture K1 integrated circuit testing K1 proximity effect (lithography) K1 semiconductor process modelling K1 silicon K1 PSM technologies K1 Si K1 UDSM IC manufacturing K1 accelerating algorithms K1 optical proximity correction K1 phase shifting mask K1 post-OPC silicon verification tool K1 process modelling SP None LK http://dx.doi.org/https://doi.org/10.1109/ICASIC.2003.1277471 DO https://doi.org/10.1109/ICASIC.2003.1277471 SF ELIB - SuUB Bremen
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