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1 Ergebnisse
1
Parterre: an application-general SoC platform:
, In:
ASIC, 2003. Proceedings. 5th International Conference on
,
Yu Mingyan, Yu Mingyan
;
Xie Xuejun, Xie Xuejun
;
Wang Jinxiang, Wang Jinxiang
... - p. None , 2003
Link:
https://doi.org/10.1109/ICASIC.2003.1277575
RT T1
ASIC, 2003. Proceedings. 5th International Conference on
: T1
Parterre: an application-general SoC platform
UL https://suche.suub.uni-bremen.de/peid=ieee-5733762&Exemplar=1&LAN=DE A1 Yu Mingyan, Yu Mingyan A1 Xie Xuejun, Xie Xuejun A1 Wang Jinxiang, Wang Jinxiang A1 Ye Yizheng, Ye Yizheng A1 Zhang Qingli, Zhang Qingli A1 Wang Chenxu, Wang Chenxu YR 2003 SN 1523-553X K1 CMOS digital integrated circuits K1 microprocessor chips K1 program debugging K1 system buses K1 system-on-chip K1 0.25 micron K1 3-bus subplatform K1 CMOS technology K1 FPU K1 IP verifying subplatform K1 IU K1 Lilac chip K1 MMU K1 Parterre platform K1 SoC platform K1 TTM K1 aerocraft control K1 floating point unit K1 integer unit K1 memory management unit K1 on-chip buses K1 product complexity K1 system debugging sub-platform K1 time-to-market SP None LK http://dx.doi.org/https://doi.org/10.1109/ICASIC.2003.1277575 DO https://doi.org/10.1109/ICASIC.2003.1277575 SF ELIB - SuUB Bremen
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