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1 Ergebnisse
1
Modeling and test for parasitic resistance and capacitance ..:
, In:
2012 12th Annual Non-Volatile Memory Technology Symposium Proceedings
,
Pan, Xiujuan
;
Cui, Xiaole
;
Zha, Jin
.. - p. 73-76 , 2012
Link:
https://doi.org/10.1109/NVMTS.2013.6632866
RT T1 <cTitle>2012 12th Annual Non-Volatile Memory Technology Symposium Proceedings</cTitle>: T1 <Title>Modeling and test for parasitic resistance and capacitance defects in PCM</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-6632866&Exemplar=1&LAN=DE A1 Pan, Xiujuan A1 Cui, Xiaole A1 Zha, Jin A1 Lin, Xinnan A1 Lee, Chung Len YR 2012 K1 Resistance K1 Circuit faults K1 Phase change materials K1 Parasitic capacitance K1 Integrated circuit modeling K1 Programming K1 PCM K1 capacitance and resistance defects K1 SPICE model K1 fault model K1 test algorithm SP 73 OP 76 LK http://dx.doi.org/https://doi.org/10.1109/NVMTS.2013.6632866 DO https://doi.org/10.1109/NVMTS.2013.6632866 SF ELIB - SuUB Bremen
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