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A 640 MB/s bi-directional data strobed, double-data-rate SD..:
, In:
1998 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, ISSCC. First Edition (Cat. No.98CH36156)
,
Kim, C.
;
Cho, S.
;
Lee, J.
... - p. 158,159 , 1998
Link:
https://doi.org/10.1109/ISSCC.1998.672415
RT T1
1998 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, ISSCC. First Edition (Cat. No.98CH36156)
: T1
A 640 MB/s bi-directional data strobed, double-data-rate SDRAM with a 40 mW DLL circuit for a 256 MB memory system
UL https://suche.suub.uni-bremen.de/peid=ieee-672415&Exemplar=1&LAN=DE A1 Kim, C. A1 Cho, S. A1 Lee, J. A1 Kim, B. A1 Park, C. A1 Lee, S. A1 Roh, J. A1 Nam, H. A1 Kim, D. A1 Jung, T. YR 1998 SN 0193-6530 K1 Bidirectional control K1 SDRAM K1 Circuits K1 Clocks K1 Delay K1 Data structures K1 Boolean functions K1 Frequency K1 Bandwidth K1 Prefetching SP 158,159 LK http://dx.doi.org/https://doi.org/10.1109/ISSCC.1998.672415 DO https://doi.org/10.1109/ISSCC.1998.672415 SF ELIB - SuUB Bremen
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