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1 Ergebnisse
1
Lifetime-aware LRU promotion policy for last-level cache:
, In:
VLSI Design, Automation and Test(VLSI-DAT)
,
Wu, Hong-Yi
;
Chen, Chien-Chih
;
Tsai, Hsiang-Jen
.. - p. 1-4 , 2015
Link:
https://doi.org/10.1109/VLSI-DAT.2015.7114579
RT T1
VLSI Design, Automation and Test(VLSI-DAT)
: T1
Lifetime-aware LRU promotion policy for last-level cache
UL https://suche.suub.uni-bremen.de/peid=ieee-7114579&Exemplar=1&LAN=DE A1 Wu, Hong-Yi A1 Chen, Chien-Chih A1 Tsai, Hsiang-Jen A1 Peng, Yin-Chi A1 Chen, Tien-Fu YR 2015 K1 Radiation detectors K1 Multicore processing K1 Electronics packaging K1 Interference K1 Monitoring K1 Runtime K1 Heuristic algorithms SP 1 OP 4 LK http://dx.doi.org/https://doi.org/10.1109/VLSI-DAT.2015.7114579 DO https://doi.org/10.1109/VLSI-DAT.2015.7114579 SF ELIB - SuUB Bremen
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