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On the Design of a Fault Tolerant Ripple-Carry Adder with C..:
, In:
2015 IEEE Computer Society Annual Symposium on VLSI
,
Ghasemzadeh, H.
;
Gaillardon, P.E.
;
Zhang, J.
... - p. 491-496 , 2015
Link:
https://doi.org/10.1109/ISVLSI.2015.13
RT T1
2015 IEEE Computer Society Annual Symposium on VLSI
: T1
On the Design of a Fault Tolerant Ripple-Carry Adder with Controllable-Polarity Transistors
UL https://suche.suub.uni-bremen.de/peid=ieee-7309619&Exemplar=1&LAN=DE A1 Ghasemzadeh, H. A1 Gaillardon, P.E. A1 Zhang, J. A1 De Micheli, G. A1 Sanchez, E. A1 Sonza Reorda, M. YR 2015 SN 2159-3469 SN 2159-3477 K1 Circuit faults K1 Logic gates K1 Adders K1 Transistors K1 Integrated circuit modeling K1 Fault tolerance K1 Fault tolerant systems K1 Controllable-polarity Transistors K1 Fault model K1 Fault-tolerant adder SP 491 OP 496 LK http://dx.doi.org/https://doi.org/10.1109/ISVLSI.2015.13 DO https://doi.org/10.1109/ISVLSI.2015.13 SF ELIB - SuUB Bremen
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