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Cost reduction of system-level tests with stressed structur..:

, In: 2015 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC),
Liou, Jing-Jia ; Hsieh, Meng-Ta ; Cherng, Jun-Fei. - p. 177-182 , 2015
Link: https://doi.org/10.1109/VLSI-SoC.2015.7314412