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1 Ergebnisse
1
Improved 20nm device yield and gate dielectric integrity wi..:
, In:
2016 27th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC)
,
Williams, David
;
Bordelon, Clint
;
Drizlikh, Sergei
... - p. 308-312 , 2016
Link:
https://doi.org/10.1109/ASMC.2016.7491155
RT T1 <cTitle>2016 27th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC)</cTitle>: T1 <Title>Improved 20nm device yield and gate dielectric integrity with optimized aluminum metal fill process</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-7491155&Exemplar=1&LAN=DE A1 Williams, David A1 Bordelon, Clint A1 Drizlikh, Sergei A1 Kirsch, Paul D. A1 Lam, Kin-Sang A1 Coppala, Paul A1 Guerassio, Ian A1 Hira, Nikhil Bharat A1 Trigno, Steven A1 Nester, Paul A1 Paulsen, Ryan A1 Patel, Anuj A1 Kim, Jun-Han A1 Park, Jungmin A1 Kim, Taegyun A1 Kang, Hee Sung A1 Seo, Jinho A1 An, Chulwan A1 Wang, Sunjong YR 2016 SN 2376-6697 K1 Logic gates K1 Aluminum K1 Transistors K1 Standards K1 Annealing K1 Dielectric breakdown K1 Metal gate K1 gate last K1 20nm K1 VRamp K1 dielectric breakdown K1 Aluminum diffusion K1 TiAl SP 308 OP 312 LK http://dx.doi.org/https://doi.org/10.1109/ASMC.2016.7491155 DO https://doi.org/10.1109/ASMC.2016.7491155 SF ELIB - SuUB Bremen
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