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1 Ergebnisse
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From model to FPGA: Software-hardware co-design for efficie..:
, In:
2016 IEEE Hot Chips 28 Symposium (HCS)
,
Kaiyuan Guo
;
Lingzhi Sui
;
Jiantao Qiu
... - p. 1-27 , 2016
Link:
https://doi.org/10.1109/HOTCHIPS.2016.7936208
RT T1
2016 IEEE Hot Chips 28 Symposium (HCS)
: T1
From model to FPGA: Software-hardware co-design for efficient neural network acceleration
UL https://suche.suub.uni-bremen.de/peid=ieee-7936208&Exemplar=1&LAN=DE A1 Kaiyuan Guo A1 Lingzhi Sui A1 Jiantao Qiu A1 Song Yao A1 Song Han A1 Yu Wang A1 Huazhong Yang YR 2016 K1 Machine learning K1 Computer architecture K1 Neural networks K1 Acceleration K1 Speech recognition K1 Market research K1 Streaming media SP 1 OP 27 LK http://dx.doi.org/https://doi.org/10.1109/HOTCHIPS.2016.7936208 DO https://doi.org/10.1109/HOTCHIPS.2016.7936208 SF ELIB - SuUB Bremen
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