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A CT ΔΣ ADC with 9/50MHz BW achieving 73/71dB DR designed f..:
, In:
ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference
,
Conzatti, Francesco
;
Dorrer, Lukas
;
Torta, Patrick
... - p. 139-142 , 2017
Link:
https://doi.org/10.1109/ESSCIRC.2017.8094545
RT T1 <cTitle>ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference</cTitle>: T1 <Title>A CT ΔΣ ADC with 9/50MHz BW achieving 73/71dB DR designed for robust blocker tolerance in 14nm FinFET</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-8094545&Exemplar=1&LAN=DE A1 Conzatti, Francesco A1 Dorrer, Lukas A1 Torta, Patrick A1 Kropf, Claus A1 Patzold, Dirk A1 San Pablo Garcia, Jacinto A1 Rallos, Venerando A1 Schembera, Norbert YR 2017 K1 FinFETs K1 Resistors K1 Signal to noise ratio K1 Receivers K1 Dynamic range K1 Topology K1 Computer architecture SP 139 OP 142 LK http://dx.doi.org/https://doi.org/10.1109/ESSCIRC.2017.8094545 DO https://doi.org/10.1109/ESSCIRC.2017.8094545 SF ELIB - SuUB Bremen
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