I agree that this site is using cookies. You can find further informations
here
.
X
Login
Merkliste (
0
)
Home
About us
Home About us
Our history
Profile
Press & public relations
Friends
The library in figures
Exhibitions
Projects
Training, internships, careers
Films
Services & Information
Home Services & Information
Lending and interlibrary loans
Returns and renewals
Training and library tours
My Account
Library cards
New to the library?
Download Information
Opening hours
Learning spaces
PC, WLAN, copy, scan and print
Catalogs and collections
Home Catalogs and Collections
Rare books and manuscripts
Digital collections
Subject Areas
Our sites
Home Our sites
Central Library
Law Library (Juridicum)
BB Business and Economics (BB11)
BB Physics and Electrical Engineering
TB Engineering and Social Sciences
TB Economics and Nautical Sciences
TB Music
TB Art & Design
TB Bremerhaven
Contact the library
Home Contact the library
Staff Directory
Open access & publishing
Home Open access & publishing
Reference management: Citavi & RefWorks
Publishing documents
Open Access in Bremen
zur Desktop-Version
Toggle navigation
Merkliste
1 Ergebnisse
1
A simple model of inter-metallic connections (vias) in CMOS..:
, In:
2017 14th International Conference on Electrical Engineering, Computing Science and Automatic Control (CCE)
,
Sanabria, Carlos
;
Higuera Gonzalez, Rogelio M.
;
Aranda, Monico Linares
- p. 1-5 , 2017
Link:
https://doi.org/10.1109/ICEEE.2017.8108860
RT T1
2017 14th International Conference on Electrical Engineering, Computing Science and Automatic Control (CCE)
: T1
A simple model of inter-metallic connections (vias) in CMOS resonant rotary traveling wave oscillator (RTWO)
UL https://suche.suub.uni-bremen.de/peid=ieee-8108860&Exemplar=1&LAN=DE A1 Sanabria, Carlos A1 Higuera Gonzalez, Rogelio M. A1 Aranda, Monico Linares YR 2017 K1 Integrated circuit modeling K1 Integrated circuit interconnections K1 Metals K1 Semiconductor device modeling K1 Oscillators K1 Layout K1 Resonant frequency K1 RTWO K1 Inter-metallic vias K1 CMOS integrated circuits SP 1 OP 5 LK http://dx.doi.org/https://doi.org/10.1109/ICEEE.2017.8108860 DO https://doi.org/10.1109/ICEEE.2017.8108860 SF ELIB - SuUB Bremen
Export
RefWorks (nur Desktop-Version!)
Flow
(Zuerst in
Flow
einloggen, dann importieren)