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1 Ergebnisse
1
A 1.2ps-jitter fully-synthesizable fully-calibrated fractio..:
, In:
2018 IEEE Custom Integrated Circuits Conference (CICC)
,
Liu, Bangan
;
Pang, Jian
;
Narayanan, Aravind Tharayil
... - p. 1-4 , 2018
Link:
https://doi.org/10.1109/CICC.2018.8357041
RT T1
2018 IEEE Custom Integrated Circuits Conference (CICC)
: T1
A 1.2ps-jitter fully-synthesizable fully-calibrated fractional-N injection-locked PLL using true arbitrary nonlinearity calibration technique
UL https://suche.suub.uni-bremen.de/peid=ieee-8357041&Exemplar=1&LAN=DE A1 Liu, Bangan A1 Pang, Jian A1 Narayanan, Aravind Tharayil A1 Yang, Dongsheng A1 Liu, Hanli A1 Okada, Kenichi A1 Matsuzawa, Akira A1 Ngo, Huy Cu A1 Nakata, Kengo A1 Deng, Wei A1 Zhang, Yuncheng A1 Qiu, Junjun A1 Yoshioka, Torn A1 Emmei, Jun A1 Zhang, Haosheng YR 2018 SN 2152-3630 K1 Calibration K1 Phase locked loops K1 Jitter K1 Delays K1 Oscillators K1 Layout K1 Gain K1 fully-synthesizable K1 digital PLL K1 injection-locked PLL K1 DTC calibration SP 1 OP 4 LK http://dx.doi.org/https://doi.org/10.1109/CICC.2018.8357041 DO https://doi.org/10.1109/CICC.2018.8357041 SF ELIB - SuUB Bremen
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