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1 Ergebnisse
1
A pipeline ROM-less DDFS using equal-division interpolation:
, In:
2017 International SoC Design Conference (ISOCC)
,
Tsai, Tsung-Yi
;
Shih, Hsiang-Yu
;
Wang, Chua-Chin
- p. 19-20 , 2017
Link:
https://doi.org/10.1109/ISOCC.2017.8368808
RT T1
2017 International SoC Design Conference (ISOCC)
: T1
A pipeline ROM-less DDFS using equal-division interpolation
UL https://suche.suub.uni-bremen.de/peid=ieee-8368808&Exemplar=1&LAN=DE A1 Tsai, Tsung-Yi A1 Shih, Hsiang-Yu A1 Wang, Chua-Chin YR 2017 K1 Interpolation K1 Pipelines K1 Mathematical model K1 Clocks K1 Registers K1 Computer architecture K1 Frequency synthesizers K1 frequency synthesizer K1 DDFS K1 parabolic polynomial interpolation K1 SFDR K1 FCW SP 19 OP 20 LK http://dx.doi.org/https://doi.org/10.1109/ISOCC.2017.8368808 DO https://doi.org/10.1109/ISOCC.2017.8368808 SF ELIB - SuUB Bremen
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