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Chip-First Fan-Out Panel-Level Packaging for Heterogeneous ..:

, In: 2018 IEEE 68th Electronic Components and Technology Conference (ECTC),

Ko, Cheng-Ta ; Chang, Chieh-Lin ; Pan, Jhih-Yuan... - p. 355-363 , 2018

Link: https://doi.org/10.1109/ECTC.2018.00061

RT 
T1 <cTitle>2018 IEEE 68th Electronic Components and Technology Conference (ECTC)</cTitle>: T1 <Title>Chip-First Fan-Out Panel-Level Packaging for Heterogeneous Integration</Title>

UL https://suche.suub.uni-bremen.de/peid=ieee-8429574&Exemplar=1&LAN=DE
				
A1 Ko, Cheng-Ta
A1 Chang, Chieh-Lin
A1 Pan, Jhih-Yuan
A1 Wu, Hsing-Hui
A1 Yong, Qing Xiang
A1 Fan, Nelson
A1 Kuah, Eric
A1 Li, Zhang
A1 Tan, Kim Hwee
A1 Cheung, Y. M.
A1 Ng, Eric Ng
A1 Yang, Henry
A1 Kai, Wu
A1 Hao, Ji
A1 Beica, Rozalia
A1 Lin, Marc
A1 Chen, Y.H.
A1 Cheng, Zhong
A1 Wee, Koh Sau
A1 Ran, Jiang
A1 Xi, Cao
A1 Lim, Sze Pei
A1 Lau, John
A1 Lee, N.C.
A1 Tao, Mian
A1 Lo, Jeffery
A1 Lee, Ricky
A1 Li, Ming
A1 Li, Margie
A1 Lin, Curry
A1 Lin, J.W.
A1 Chen, Tony
A1 Xu, Iris
YR 2018
SN 2377-5726
K1 Electromagnetic compatibility
K1 Metals
K1 Resists
K1 Compression molding
K1 Capacitors
K1 Plating
K1 Fan Out
K1 Panel Level
K1 RDL
K1 Heterogeneous Integration
SP 355
OP 363
LK http://dx.doi.org/https://doi.org/10.1109/ECTC.2018.00061
DO https://doi.org/10.1109/ECTC.2018.00061
SF ELIB - SuUB Bremen

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