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1
Faster Localization of Logic Soft Failures Using a Combinat..:
, In:
2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)
,
Goh, S.H.
;
Chun, Tay Chee
;
Ngow, Y.T.
... - p. 1-5 , 2018
Link:
https://doi.org/10.1109/IPFA.2018.8452553
RT T1
2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)
: T1
Faster Localization of Logic Soft Failures Using a Combination of Scan Diagnosis at Reduced VDD and LADA
UL https://suche.suub.uni-bremen.de/peid=ieee-8452553&Exemplar=1&LAN=DE A1 Goh, S.H. A1 Chun, Tay Chee A1 Ngow, Y.T. A1 Yeoh, B.L. A1 Susanto, Edy A1 Hao, Hu A1 Thor, MH A1 Lin, Zhao A1 Chan, Y.H. A1 Lam, Jeffrey YR 2018 SN 1946-1550 K1 Circuit faults K1 Tools K1 Integrated circuits K1 Testing K1 Fiber lasers K1 Inspection SP 1 OP 5 LK http://dx.doi.org/https://doi.org/10.1109/IPFA.2018.8452553 DO https://doi.org/10.1109/IPFA.2018.8452553 SF ELIB - SuUB Bremen
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