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1 Ergebnisse
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A 128×120 5-Wire 1.96mm2 40nm/90nm 3D Stacked SPAD Time Res..:
, In:
2019 Symposium on VLSI Circuits
,
Al Abbas, Tarek
;
Almer, Oscar
;
Hutchings, Sam W.
... - p. C260-C261 , 2019
Link:
https://doi.org/10.23919/VLSIC.2019.8777979
RT T1
2019 Symposium on VLSI Circuits
: T1
A 128×120 5-Wire 1.96mm2 40nm/90nm 3D Stacked SPAD Time Resolved Image Sensor SoC for Microendoscopy
UL https://suche.suub.uni-bremen.de/peid=ieee-8777979&Exemplar=1&LAN=DE A1 Al Abbas, Tarek A1 Almer, Oscar A1 Hutchings, Sam W. A1 Erdogan, Ahmet T. A1 Gyongy, Istvan A1 Dutton, Neale A.W. A1 Henderson, Robert K. YR 2019 SN 2158-5636 K1 Image resolution K1 Logic gates K1 Fluorescence K1 Clocks K1 Imaging K1 Dynamic range SP C260 OP C261 LK http://dx.doi.org/https://doi.org/10.23919/VLSIC.2019.8777979 DO https://doi.org/10.23919/VLSIC.2019.8777979 SF ELIB - SuUB Bremen
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