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1 Ergebnisse
1
Twin-Bit Resistive Random Access Memory in FinFET CMOS Logi..:
, In:
2019 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)
,
Lee, Chieh
;
Hung, Yu-Ting
;
Lin, Cheng-Jun
.. - p. 1-2 , 2019
Link:
https://doi.org/10.1109/VLSI-TSA.2019.8804634
RT T1
2019 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)
: T1
Twin-Bit Resistive Random Access Memory in FinFET CMOS Logic Technologies
UL https://suche.suub.uni-bremen.de/peid=ieee-8804634&Exemplar=1&LAN=DE A1 Lee, Chieh A1 Hung, Yu-Ting A1 Lin, Cheng-Jun A1 King, Ya-Chin A1 Lin, Chrong Jung YR 2019 K1 Computer architecture K1 Microprocessors K1 FinFETs K1 Logic gates K1 Metals K1 CMOS technology SP 1 OP 2 LK http://dx.doi.org/https://doi.org/10.1109/VLSI-TSA.2019.8804634 DO https://doi.org/10.1109/VLSI-TSA.2019.8804634 SF ELIB - SuUB Bremen
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