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1
Fabrication of $\Omega$ -gated Negative Capacitance FinFETs..:
, In:
2019 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)
,
Sung, P.-J.
;
Su, C.-J.
;
Lu, D. D.
... - p. 1-2 , 2019
Link:
https://doi.org/10.1109/VLSI-TSA.2019.8804663
RT T1 <cTitle>2019 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)</cTitle>: T1 <Title>Fabrication of $\Omega$ -gated Negative Capacitance FinFETs and SRAM</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-8804663&Exemplar=1&LAN=DE A1 Sung, P.-J. A1 Su, C.-J. A1 Lu, D. D. A1 Luo, S.-X. A1 Kao, K.-H. A1 Ciou, J.-Y. A1 Jao, C.-Y. A1 Hsu, H.-S. A1 Wang, C.-J. A1 Hong, T.-C. A1 Liao, T.-H. A1 Fang, C.-C. A1 Wang, Y.-S. A1 Huang, H.-F. A1 Li, J.-H. A1 Huang, Y.-C. A1 Hsueh, F.-K. A1 Wu, C.-T. A1 Huang, Y.-C. A1 Ma, W. C.-Y. A1 Huang, K.-P. A1 Lee, Y.-J. A1 Chao, T.-S. A1 Li, J.-Y. A1 Wu, W.-F. A1 Yeh, W.-K. A1 Wang, Y.-H. YR 2019 K1 Logic gates K1 FinFETs K1 Inverters K1 Fabrication K1 Random access memory K1 Iron K1 Passivation SP 1 OP 2 LK http://dx.doi.org/https://doi.org/10.1109/VLSI-TSA.2019.8804663 DO https://doi.org/10.1109/VLSI-TSA.2019.8804663 SF ELIB - SuUB Bremen
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