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1 Ergebnisse
1
On-Chip Test Clock Validation Using A Time-to-Digital Conve..:
, In:
2019 IEEE International Test Conference in Asia (ITC-Asia)
,
Miyake, Yousuke
;
Kajihara, Seiji
;
Chen, Poki
- p. 157-162 , 2019
Link:
https://doi.org/10.1109/ITC-Asia.2019.00040
RT T1
2019 IEEE International Test Conference in Asia (ITC-Asia)
: T1
On-Chip Test Clock Validation Using A Time-to-Digital Converter in FPGAs
UL https://suche.suub.uni-bremen.de/peid=ieee-8872069&Exemplar=1&LAN=DE A1 Miyake, Yousuke A1 Kajihara, Seiji A1 Chen, Poki YR 2019 K1 Clocks K1 Delays K1 Testing K1 Field programmable gate arrays K1 Q measurement K1 Conferences K1 Asia K1 FPGA K1 Built-In Self-Test K1 Delay testing K1 Variable test clock K1 Time-to-Digital Converter SP 157 OP 162 LK http://dx.doi.org/https://doi.org/10.1109/ITC-Asia.2019.00040 DO https://doi.org/10.1109/ITC-Asia.2019.00040 SF ELIB - SuUB Bremen
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