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1
Investigation of Back Gate Effects on the Electrical Charac..:
, In:
2019 9th Annual Information Technology, Electromechanical Engineering and Microelectronics Conference (IEMECON)
,
Garg, Mohit
;
Chaubey, V. K.
;
Sinha, Soumendu
- p. 75-80 , 2019
Link:
https://doi.org/10.1109/IEMECONX.2019.8877019
RT T1 <cTitle>2019 9th Annual Information Technology, Electromechanical Engineering and Microelectronics Conference (IEMECON)</cTitle>: T1 <Title>Investigation of Back Gate Effects on the Electrical Characteristics of Fully-Depleted Silicon-On-Insulator MOSFET</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-8877019&Exemplar=1&LAN=DE A1 Garg, Mohit A1 Chaubey, V. K. A1 Sinha, Soumendu YR 2019 K1 Logic gates K1 Threshold voltage K1 Silicon-on-insulator K1 Electric potential K1 MOSFET K1 Transconductance K1 Electrostatics SP 75 OP 80 LK http://dx.doi.org/https://doi.org/10.1109/IEMECONX.2019.8877019 DO https://doi.org/10.1109/IEMECONX.2019.8877019 SF ELIB - SuUB Bremen
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