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1
Stuck-at Fault Resilience using Redundant Transistor Logic ..:
, In:
2019 IEEE Intl Conf on Dependable, Autonomic and Secure Computing, Intl Conf on Pervasive Intelligence and Computing, Intl Conf on Cloud and Big Data Computing, Intl Conf on Cyber Science and Technology Congress (DASC/PiCom/CBDCom/CyberSciTech)
,
McWilliam, Richard
;
Schiefer, Philipp
;
Purvis, Alan
. - p. 595-601 , 2019
Link:
https://doi.org/10.1109/DASC/PiCom/CBDCom/CyberSciTech..
RT T1
2019 IEEE Intl Conf on Dependable, Autonomic and Secure Computing, Intl Conf on Pervasive Intelligence and Computing, Intl Conf on Cloud and Big Data Computing, Intl Conf on Cyber Science and Technology Congress (DASC/PiCom/CBDCom/CyberSciTech)
: T1
Stuck-at Fault Resilience using Redundant Transistor Logic Gates
UL https://suche.suub.uni-bremen.de/peid=ieee-8890495&Exemplar=1&LAN=DE A1 McWilliam, Richard A1 Schiefer, Philipp A1 Purvis, Alan A1 Khan, Samir YR 2019 K1 Circuit faults K1 Logic gates K1 Redundancy K1 Transistors K1 Resilience K1 Fault tolerant systems K1 Self healing K1 Self protection K1 Fault tolerant Systems SP 595 OP 601 LK http://dx.doi.org/https://doi.org/10.1109/DASC/PiCom/CBDCom/CyberSciTech.2019.00115 DO https://doi.org/10.1109/DASC/PiCom/CBDCom/CyberSciTech.2019.00115 SF ELIB - SuUB Bremen
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