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1 Ergebnisse
1
A Low-Latency Multi-Version Key-Value Store Using B-Tree on..:
, In:
2019 29th International Conference on Field Programmable Logic and Applications (FPL)
,
Ren, Yuchen
;
Liao, Zhijian
;
Shi, Xiaozhong
... - p. 321-325 , 2019
Link:
https://doi.org/10.1109/FPL.2019.00058
RT T1
2019 29th International Conference on Field Programmable Logic and Applications (FPL)
: T1
A Low-Latency Multi-Version Key-Value Store Using B-Tree on an FPGA-CPU Platform
UL https://suche.suub.uni-bremen.de/peid=ieee-8892252&Exemplar=1&LAN=DE A1 Ren, Yuchen A1 Liao, Zhijian A1 Shi, Xiaozhong A1 Xie, Jinyu A1 Qiu, Yunhui A1 Lv, Hankun A1 Yin, Wenbo A1 Wang, Lingli A1 Yu, Bowei A1 Chen, Hua A1 He, Xianjun YR 2019 SN 1946-1488 K1 Field programmable gate arrays K1 Engines K1 Indexing K1 Transceivers K1 Computer architecture K1 Acceleration K1 Random access memory K1 multi-version K1 key-value store K1 B-tree K1 FPGA-CPU heterogeneous architecture SP 321 OP 325 LK http://dx.doi.org/https://doi.org/10.1109/FPL.2019.00058 DO https://doi.org/10.1109/FPL.2019.00058 SF ELIB - SuUB Bremen
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