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1
Modeling Digital Low-Dropout Regulator with a Multiple Samp..:
, In:
2019 IEEE 13th International Conference on Anti-counterfeiting, Security, and Identification (ASID)
,
Geng, Jiarong
;
Yu, Baodong
;
Shen, Chongfei
... - p. 207-210 , 2019
Link:
https://doi.org/10.1109/ICASID.2019.8925294
RT T1
2019 IEEE 13th International Conference on Anti-counterfeiting, Security, and Identification (ASID)
: T1
Modeling Digital Low-Dropout Regulator with a Multiple Sampling Frequency Circuit Technology
UL https://suche.suub.uni-bremen.de/peid=ieee-8925294&Exemplar=1&LAN=DE A1 Geng, Jiarong A1 Yu, Baodong A1 Shen, Chongfei A1 Zhang, Hongda A1 Liu, Zhaozhe A1 Wan, Peiyuan A1 Chen, Zhijie YR 2019 SN 2163-5056 K1 Regulators K1 Time-frequency analysis K1 Integrated circuit modeling K1 digital low-dropout regulator K1 multiple sampling frequencies K1 setup time K1 model SP 207 OP 210 LK http://dx.doi.org/https://doi.org/10.1109/ICASID.2019.8925294 DO https://doi.org/10.1109/ICASID.2019.8925294 SF ELIB - SuUB Bremen
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