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1 Ergebnisse
1
Fast and Memory Compact Routing Algorithm for FPGA:
, In:
2019 IEEE 1st International Conference on Energy, Systems and Information Processing (ICESIP)
,
Sudhanya, P
;
Rani, S. P Joy Vasantha
;
Ali, S Divyath
- p. 1-6 , 2019
Link:
https://doi.org/10.1109/ICESIP46348.2019.8938275
RT T1
2019 IEEE 1st International Conference on Energy, Systems and Information Processing (ICESIP)
: T1
Fast and Memory Compact Routing Algorithm for FPGA
UL https://suche.suub.uni-bremen.de/peid=ieee-8938275&Exemplar=1&LAN=DE A1 Sudhanya, P A1 Rani, S. P Joy Vasantha A1 Ali, S Divyath YR 2019 K1 Routing K1 Field programmable gate arrays K1 Sorting K1 Resource management K1 Integrated circuit interconnections K1 Logic gates K1 Switches K1 FPGA K1 RRG K1 heap sort K1 routing time K1 run time K1 CAD K1 physical design K1 VPR SP 1 OP 6 LK http://dx.doi.org/https://doi.org/10.1109/ICESIP46348.2019.8938275 DO https://doi.org/10.1109/ICESIP46348.2019.8938275 SF ELIB - SuUB Bremen
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