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Design of Logic Blocks for Efficient Architecture of FPGA:

, In: 2019 IEEE 1st International Conference on Energy, Systems and Information Processing (ICESIP),
Sudhanya, P. ; Rani, S.P. Joy Vasantha ; Lavanya, M.C. - p. 1-5 , 2019
Link: https://doi.org/10.1109/ICESIP46348.2019.8938291