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1 Ergebnisse
1
Low Power Single Bit-line Power-gated SRAM:
, In:
2018 3rd IEEE International Conference on Recent Trends in Electronics, Information & Communication Technology (RTEICT)
,
Inamdar, Akshatha P
;
Ravish Aradhya, H.V.
- p. 1478-1482 , 2018
Link:
https://doi.org/10.1109/RTEICT42901.2018.9012552
RT T1
2018 3rd IEEE International Conference on Recent Trends in Electronics, Information & Communication Technology (RTEICT)
: T1
Low Power Single Bit-line Power-gated SRAM
UL https://suche.suub.uni-bremen.de/peid=ieee-9012552&Exemplar=1&LAN=DE A1 Inamdar, Akshatha P A1 Ravish Aradhya, H.V. YR 2018 K1 Random access memory K1 Transistors K1 Logic gates K1 Inverters K1 Switching circuits K1 Decoding K1 Circuit stability K1 Power-gating K1 Low power operation K1 Single bitline K1 Static Noise Margin K1 Sleepy stack SP 1478 OP 1482 LK http://dx.doi.org/https://doi.org/10.1109/RTEICT42901.2018.9012552 DO https://doi.org/10.1109/RTEICT42901.2018.9012552 SF ELIB - SuUB Bremen
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