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Power and Delay Optimization of FinFET based Adiabatic Logi..:
, In:
2019 4th International Conference on Recent Trends on Electronics, Information, Communication & Technology (RTEICT)
,
Kumar, B Ganesh
;
Gaded, Shivakumar V
;
Srividya, P
- p. 617-621 , 2019
Link:
https://doi.org/10.1109/RTEICT46194.2019.9016885
RT T1 <cTitle>2019 4th International Conference on Recent Trends on Electronics, Information, Communication & Technology (RTEICT)</cTitle>: T1 <Title>Power and Delay Optimization of FinFET based Adiabatic Logic SRAM Cell</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-9016885&Exemplar=1&LAN=DE A1 Kumar, B Ganesh A1 Gaded, Shivakumar V A1 Srividya, P YR 2019 K1 Adiabatic K1 Delays K1 SRAM cells K1 FinFETs K1 Power demand K1 Fin Field Effect Transistors [FinFETs] K1 Adiabatic logic K1 Static Random-Access Memory [SRAM] K1 Modified Cascade Pre-Resolve Logic [MCPL] K1 Efficient Charge Recovery Logic [ECRL] K1 Differential Voltage Scaling [DVS] SP 617 OP 621 LK http://dx.doi.org/https://doi.org/10.1109/RTEICT46194.2019.9016885 DO https://doi.org/10.1109/RTEICT46194.2019.9016885 SF ELIB - SuUB Bremen
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