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1 Ergebnisse
1
RamGen: Moving Memories from Physical to the Logical Domain:
, In:
2019 20th International Workshop on Microprocessor/SoC Test, Security and Verification (MTV)
,
Scott, Jeff
;
Sadowsky, Jonathan
;
Savla, Jigar Kuverji
- p. 41-44 , 2019
Link:
https://doi.org/10.1109/MTV48867.2019.00016
RT T1
2019 20th International Workshop on Microprocessor/SoC Test, Security and Verification (MTV)
: T1
RamGen: Moving Memories from Physical to the Logical Domain
UL https://suche.suub.uni-bremen.de/peid=ieee-9027248&Exemplar=1&LAN=DE A1 Scott, Jeff A1 Sadowsky, Jonathan A1 Savla, Jigar Kuverji YR 2019 SN 2332-5674 K1 Random access memory K1 Silicon K1 Error correction codes K1 Registers K1 Databases K1 Conferences K1 Timing K1 design K1 verification K1 methodology K1 UVM K1 SystemVerilog K1 front end K1 ASICs SP 41 OP 44 LK http://dx.doi.org/https://doi.org/10.1109/MTV48867.2019.00016 DO https://doi.org/10.1109/MTV48867.2019.00016 SF ELIB - SuUB Bremen
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