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Field Programmable Gate Array Hardware Accelerator of Prime..:
, In:
2019 17th International Conference on Emerging eLearning Technologies and Applications (ICETA)
,
Mados, B.
;
Bilanova, Z.
;
Chovancova, E.
. - p. 493-498 , 2019
Link:
https://doi.org/10.1109/ICETA48886.2019.9040020
RT T1 <cTitle>2019 17th International Conference on Emerging eLearning Technologies and Applications (ICETA)</cTitle>: T1 <Title>Field Programmable Gate Array Hardware Accelerator of Prime Implicants Generation for Single-Output Boolean Functions Minimization</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-9040020&Exemplar=1&LAN=DE A1 Mados, B. A1 Bilanova, Z. A1 Chovancova, E. A1 Adam, N. YR 2019 K1 Boolean functions K1 Logic gates K1 Hardware K1 Minimization K1 Input variables K1 Encoding K1 Field programmable gate arrays K1 minimization K1 prime implicants K1 combinational logic K1 FPGA K1 field programmable gate array K1 hardware accelerator SP 493 OP 498 LK http://dx.doi.org/https://doi.org/10.1109/ICETA48886.2019.9040020 DO https://doi.org/10.1109/ICETA48886.2019.9040020 SF ELIB - SuUB Bremen
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