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1 Ergebnisse
1
2.5 A 7nm FinFET 2.5GHz/2.0GHz Dual-Gear Octa-Core CPU Subs..:
, In:
2020 IEEE International Solid- State Circuits Conference - (ISSCC)
,
Mair, Hugh
;
Wang, Ericbill
;
Nayak, Ashish
... - p. 50-52 , 2020
Link:
https://doi.org/10.1109/ISSCC19947.2020.9062897
RT T1
2020 IEEE International Solid- State Circuits Conference - (ISSCC)
: T1
2.5 A 7nm FinFET 2.5GHz/2.0GHz Dual-Gear Octa-Core CPU Subsystem with Power/Performance Enhancements for a Fully Integrated 5G Smartphone SoC
UL https://suche.suub.uni-bremen.de/peid=ieee-9062897&Exemplar=1&LAN=DE A1 Mair, Hugh A1 Wang, Ericbill A1 Nayak, Ashish A1 Lagerquist, Rolf A1 Chou, Loda A1 Gammie, Gordon A1 Chen, Hsinchen A1 Yong, Lee-Kee A1 Rahman, Manzur A1 Wiedemeier, Jenny A1 Madhavaram, Ramu A1 Chiou, Alex A1 Li, Blundt A1 Lin, Vincent A1 Huang, Rory A1 Yanq, Michael A1 Thippana, Achuta A1 Su, Osric A1 Huang, SA YR 2020 SN 2376-8606 K1 Clocks K1 Delays K1 Silicon K1 Oscillators K1 5G mobile communication K1 Software K1 Frequency locked loops SP 50 OP 52 LK http://dx.doi.org/https://doi.org/10.1109/ISSCC19947.2020.9062897 DO https://doi.org/10.1109/ISSCC19947.2020.9062897 SF ELIB - SuUB Bremen
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