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An Architectural Study for Inference Coprocessor Core at th..:
, In:
2020 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS)
,
Watanabe, Daisuke
;
Yano, Yuji
;
Izumi, Shintaro
... - p. 305-309 , 2020
Link:
https://doi.org/10.1109/AICAS48895.2020.9073992
RT T1 <cTitle>2020 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS)</cTitle>: T1 <Title>An Architectural Study for Inference Coprocessor Core at the Edge in IoT Sensing</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-9073992&Exemplar=1&LAN=DE A1 Watanabe, Daisuke A1 Yano, Yuji A1 Izumi, Shintaro A1 Kawaguchi, Hiroshi A1 Takeuchi, Kiyoshi A1 Hiramoto, Toshiro A1 Iwai, Shoichi A1 Murakata, Masami A1 Yoshimoto, Masahiko YR 2020 K1 Conferences K1 Machine learning K1 Coprocessors K1 Medical services K1 Heart beat K1 Manufacturing automation K1 Coprocessor K1 ioT K1 low power inference K1 machine learning K1 soC SP 305 OP 309 LK http://dx.doi.org/https://doi.org/10.1109/AICAS48895.2020.9073992 DO https://doi.org/10.1109/AICAS48895.2020.9073992 SF ELIB - SuUB Bremen
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