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1 Ergebnisse
1
Dynamic Faults based Hardware Trojan Design in STT-MRAM:
, In:
2020 Design, Automation & Test in Europe Conference & Exhibition (DATE)
,
Nair, Sarath Mohanachandran
;
Bishnoi, Rajendra
;
Vijayan, Arunkumar
. - p. 933-938 , 2020
Link:
https://doi.org/10.23919/DATE48585.2020.9116471
RT T1
2020 Design, Automation & Test in Europe Conference & Exhibition (DATE)
: T1
Dynamic Faults based Hardware Trojan Design in STT-MRAM
UL https://suche.suub.uni-bremen.de/peid=ieee-9116471&Exemplar=1&LAN=DE A1 Nair, Sarath Mohanachandran A1 Bishnoi, Rajendra A1 Vijayan, Arunkumar A1 Tahoori, Mehdi B. YR 2020 SN 1558-1101 K1 Circuit faults K1 Trojan horses K1 Hardware K1 Payloads K1 Resistance K1 Couplings K1 Magnetic tunneling SP 933 OP 938 LK http://dx.doi.org/https://doi.org/10.23919/DATE48585.2020.9116471 DO https://doi.org/10.23919/DATE48585.2020.9116471 SF ELIB - SuUB Bremen
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