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1
FPGA Based Emulation Environment for Neuromorphic Architect..:
, In:
2020 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)
,
Valancius, Spencer
;
Richter, Edward
;
Purdy, Ruben
... - p. 90-97 , 2020
Link:
https://doi.org/10.1109/IPDPSW50202.2020.00022
RT T1 <cTitle>2020 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)</cTitle>: T1 <Title>FPGA Based Emulation Environment for Neuromorphic Architectures</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-9150412&Exemplar=1&LAN=DE A1 Valancius, Spencer A1 Richter, Edward A1 Purdy, Ruben A1 Rockowitz, Kris A1 Inouye, Michael A1 Mack, Joshua A1 Kumbhare, Nirmal A1 Fair, Kaitlin A1 Mixter, John A1 Akoglu, Ali YR 2020 K1 Computer architecture K1 Emulation K1 Axons K1 Neuromorphics K1 Hardware K1 Field programmable gate arrays K1 Neuromorphic computing K1 FPGA SP 90 OP 97 LK http://dx.doi.org/https://doi.org/10.1109/IPDPSW50202.2020.00022 DO https://doi.org/10.1109/IPDPSW50202.2020.00022 SF ELIB - SuUB Bremen
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