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1 Ergebnisse
1
Embedded PLL Phase Noise Measurement Based on a PFD/CP MASH..:
, In:
2020 IEEE Symposium on VLSI Circuits
,
Chou, Mao-Hsuan
;
Chang, Ya-Tin
;
Tsai, Tsung-Hsien
... - p. 1-2 , 2020
Link:
https://doi.org/10.1109/VLSICircuits18222.2020.9162789
RT T1
2020 IEEE Symposium on VLSI Circuits
: T1
Embedded PLL Phase Noise Measurement Based on a PFD/CP MASH 1-1-1 ΔΣ Time-to-Digital Converter in 7nm CMOS
UL https://suche.suub.uni-bremen.de/peid=ieee-9162789&Exemplar=1&LAN=DE A1 Chou, Mao-Hsuan A1 Chang, Ya-Tin A1 Tsai, Tsung-Hsien A1 Lu, Tsung-Che A1 Liao, Chia-Chun A1 Kuo, Hung-Yi A1 Sheen, Ruey-Bin A1 Chang, Chih-Hsien A1 Hsieh, Kenny C. H. A1 Loke, Alvin L. S. A1 Chen, Mark YR 2020 SN 2158-5636 K1 Noise measurement K1 Phase noise K1 Phase measurement K1 Jitter K1 Phase locked loops K1 Built-in self-test K1 Delays SP 1 OP 2 LK http://dx.doi.org/https://doi.org/10.1109/VLSICircuits18222.2020.9162789 DO https://doi.org/10.1109/VLSICircuits18222.2020.9162789 SF ELIB - SuUB Bremen
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