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1 Ergebnisse
1
Low Swing and Column Multiplexed Bitline Techniques for Low..:
, In:
2020 IEEE Symposium on VLSI Circuits
,
Kulkarni, J. P.
;
Malavasi, A.
;
Augustine, C.
... - p. 1-2 , 2020
Link:
https://doi.org/10.1109/VLSICircuits18222.2020.9162822
RT T1
2020 IEEE Symposium on VLSI Circuits
: T1
Low Swing and Column Multiplexed Bitline Techniques for Low-Vmin, Noise-Tolerant, High-Density, 1R1W 8T-Bitcell SRAM in 10nm FinFET CMOS
UL https://suche.suub.uni-bremen.de/peid=ieee-9162822&Exemplar=1&LAN=DE A1 Kulkarni, J. P. A1 Malavasi, A. A1 Augustine, C. A1 Tokunaga, C. A1 Tschanz, J. A1 Khellah, M. M. A1 De, V. YR 2020 SN 2158-5636 K1 Frequency measurement K1 Power measurement K1 Noise measurement K1 Logic gates K1 Multiplexing K1 FinFETs SP 1 OP 2 LK http://dx.doi.org/https://doi.org/10.1109/VLSICircuits18222.2020.9162822 DO https://doi.org/10.1109/VLSICircuits18222.2020.9162822 SF ELIB - SuUB Bremen
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