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1 Ergebnisse
1
ASIC Implementation and Optimization of 16 Bit SDRAM Memory..:
, In:
2020 IEEE International Conference on Semiconductor Electronics (ICSE)
,
Alias, Nurul Ezaila
;
Ishaak, Suhaila
;
Hong, Koo Jian
... - p. 81-84 , 2020
Link:
https://doi.org/10.1109/ICSE49846.2020.9166869
RT T1 <cTitle>2020 IEEE International Conference on Semiconductor Electronics (ICSE)</cTitle>: T1 <Title>ASIC Implementation and Optimization of 16 Bit SDRAM Memory Controller</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-9166869&Exemplar=1&LAN=DE A1 Alias, Nurul Ezaila A1 Ishaak, Suhaila A1 Hong, Koo Jian A1 Tan, Michael Loong Peng A1 Hamzah, Afiq A1 Wahab, Yasmin Abdul YR 2020 K1 Clocks K1 Switches K1 Logic gates K1 Timing K1 SDRAM K1 Optimization K1 Layout K1 ASIC K1 switching power K1 clock gating SP 81 OP 84 LK http://dx.doi.org/https://doi.org/10.1109/ICSE49846.2020.9166869 DO https://doi.org/10.1109/ICSE49846.2020.9166869 SF ELIB - SuUB Bremen
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