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Investigating the Highly Tolerant LDMOS Cell Array Design a..:
, In:
2020 32nd International Symposium on Power Semiconductor Devices and ICs (ISPSD)
,
Komatsu, Kanako
;
Shinohara, Daisuke
;
Shimizu, Mariko
... - p. 404-407 , 2020
Link:
https://doi.org/10.1109/ISPSD46842.2020.9170188
RT T1 <cTitle>2020 32nd International Symposium on Power Semiconductor Devices and ICs (ISPSD)</cTitle>: T1 <Title>Investigating the Highly Tolerant LDMOS Cell Array Design against the Negative Carrier Injection and the ESD Events</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-9170188&Exemplar=1&LAN=DE A1 Komatsu, Kanako A1 Shinohara, Daisuke A1 Shimizu, Mariko A1 Ishii, Yoshiaki A1 Sakamoto, Toshihiro A1 Yonemura, Koji A1 Matsuoka, Fumitomo YR 2020 SN 1946-0201 K1 LDMOS K1 cell array design K1 negative carrier injection K1 ESD events SP 404 OP 407 LK http://dx.doi.org/https://doi.org/10.1109/ISPSD46842.2020.9170188 DO https://doi.org/10.1109/ISPSD46842.2020.9170188 SF ELIB - SuUB Bremen
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