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1 Ergebnisse
1
Ultra-Low-Latency LDPC Decoding Architecture using Reweight..:
, In:
2020 IEEE International Symposium on Circuits and Systems (ISCAS)
,
Yun, Sangbu
;
Kam, Dongyun
;
Choe, Jeongwon
.. - p. 1-5 , 2020
Link:
https://doi.org/10.1109/ISCAS45731.2020.9181189
RT T1
2020 IEEE International Symposium on Circuits and Systems (ISCAS)
: T1
Ultra-Low-Latency LDPC Decoding Architecture using Reweighted Offset Min-Sum Algorithm
UL https://suche.suub.uni-bremen.de/peid=ieee-9181189&Exemplar=1&LAN=DE A1 Yun, Sangbu A1 Kam, Dongyun A1 Choe, Jeongwon A1 Kong, Byeong Yong A1 Lee, Youngjoo YR 2020 SN 2158-1525 K1 Decoding K1 Iterative decoding K1 Hardware K1 Table lookup K1 Read only memory K1 Wireless communication K1 Error-correction code K1 LDPC decoding K1 Low-latency processing K1 Wireless communications SP 1 OP 5 LK http://dx.doi.org/https://doi.org/10.1109/ISCAS45731.2020.9181189 DO https://doi.org/10.1109/ISCAS45731.2020.9181189 SF ELIB - SuUB Bremen
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