I agree that this site is using cookies. You can find further informations
here
.
X
Login
Merkliste (
0
)
Home
About us
Home About us
Our history
Profile
Press & public relations
Friends
The library in figures
Exhibitions
Projects
Training, internships, careers
Films
Services & Information
Home Services & Information
Lending and interlibrary loans
Returns and renewals
Training and library tours
My Account
Library cards
New to the library?
Download Information
Opening hours
Learning spaces
PC, WLAN, copy, scan and print
Catalogs and collections
Home Catalogs and Collections
Rare books and manuscripts
Digital collections
Subject Areas
Our sites
Home Our sites
Central Library
Law Library (Juridicum)
BB Business and Economics (BB11)
BB Physics and Electrical Engineering
TB Engineering and Social Sciences
TB Economics and Nautical Sciences
TB Music
TB Art & Design
TB Bremerhaven
Contact the library
Home Contact the library
Staff Directory
Open access & publishing
Home Open access & publishing
Reference management: Citavi & RefWorks
Publishing documents
Open Access in Bremen
zur Desktop-Version
Toggle navigation
Merkliste
1 Ergebnisse
1
Radiation-Harden RISC Processor for Micro-Satellites in Sta..:
, In:
2020 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)
,
Chiueh, Herming
;
Yang, Chia-Hsiang
;
Wen, Charles H.-P.
... - p. 1-2 , 2020
Link:
https://doi.org/10.1109/VLSI-DAT49148.2020.9196348
RT T1
2020 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)
: T1
Radiation-Harden RISC Processor for Micro-Satellites in Standard CMOS
UL https://suche.suub.uni-bremen.de/peid=ieee-9196348&Exemplar=1&LAN=DE A1 Chiueh, Herming A1 Yang, Chia-Hsiang A1 Wen, Charles H.-P. A1 Yang, Chao-Guang A1 Chien, Po-Hao A1 Hung, Ching-Yang A1 Chen, Yu-Jui A1 Wang, Yao-Pin A1 Chiu, Chin-Fong A1 Lin, Jer YR 2020 SN 2472-9124 K1 Random access memory K1 Tunneling magnetoresistance K1 Radiation hardening (electronics) K1 Reduced instruction set computing K1 Standards K1 Error correction codes K1 Bit error rate SP 1 OP 2 LK http://dx.doi.org/https://doi.org/10.1109/VLSI-DAT49148.2020.9196348 DO https://doi.org/10.1109/VLSI-DAT49148.2020.9196348 SF ELIB - SuUB Bremen
Export
RefWorks (nur Desktop-Version!)
Flow
(Zuerst in
Flow
einloggen, dann importieren)