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1 Ergebnisse
1
98% Endurance Error Reduction by Hard_Verify for 40nm TaOx ..:
, In:
2020 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA)
,
Yonai, Tsubasa
;
Kinoshita, Hiroshi
;
Yasuhara, Ryutaro
. - p. 35-36 , 2020
Link:
https://doi.org/10.1109/VLSI-TSA48913.2020.9203572
RT T1
2020 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA)
: T1
98% Endurance Error Reduction by Hard_Verify for 40nm TaOx based ReRAM
UL https://suche.suub.uni-bremen.de/peid=ieee-9203572&Exemplar=1&LAN=DE A1 Yonai, Tsubasa A1 Kinoshita, Hiroshi A1 Yasuhara, Ryutaro A1 Takeuchi, Ken YR 2020 K1 Reliability K1 Current distribution K1 Temperature measurement K1 Protocols K1 Resistive RAM K1 Area measurement SP 35 OP 36 LK http://dx.doi.org/https://doi.org/10.1109/VLSI-TSA48913.2020.9203572 DO https://doi.org/10.1109/VLSI-TSA48913.2020.9203572 SF ELIB - SuUB Bremen
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