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1 Ergebnisse
1
Time Multiplexing via Circuit Folding:
, In:
2020 57th ACM/IEEE Design Automation Conference (DAC)
,
Chien, Po-Chun
;
Jiang, Jie-Hong R.
- p. 1-6 , 2020
Link:
https://doi.org/10.1109/DAC18072.2020.9218552
RT T1 <cTitle>2020 57th ACM/IEEE Design Automation Conference (DAC)</cTitle>: T1 <Title>Time Multiplexing via Circuit Folding</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-9218552&Exemplar=1&LAN=DE A1 Chien, Po-Chun A1 Jiang, Jie-Hong R. YR 2020 K1 Combinational circuits K1 Pins K1 Clocks K1 Logic gates K1 Field programmable gate arrays K1 Time division multiplexing SP 1 OP 6 LK http://dx.doi.org/https://doi.org/10.1109/DAC18072.2020.9218552 DO https://doi.org/10.1109/DAC18072.2020.9218552 SF ELIB - SuUB Bremen
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