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1 Ergebnisse
1
AXI HyperConnect: A Predictable, Hypervisor-level Interconn..:
, In:
2020 57th ACM/IEEE Design Automation Conference (DAC)
,
Restuccia, Francesco
;
Biondi, Alessandro
;
Marinoni, Mauro
.. - p. 1-6 , 2020
Link:
https://doi.org/10.1109/DAC18072.2020.9218652
RT T1
2020 57th ACM/IEEE Design Automation Conference (DAC)
: T1
AXI HyperConnect: A Predictable, Hypervisor-level Interconnect for Hardware Accelerators in FPGA SoC
UL https://suche.suub.uni-bremen.de/peid=ieee-9218652&Exemplar=1&LAN=DE A1 Restuccia, Francesco A1 Biondi, Alessandro A1 Marinoni, Mauro A1 Cicero, Giorgiomaria A1 Buttazzo, Giorgio YR 2020 K1 Field programmable gate arrays K1 Hardware K1 Virtual machine monitors K1 Fabrics K1 Standards K1 Virtualization K1 Quality of service SP 1 OP 6 LK http://dx.doi.org/https://doi.org/10.1109/DAC18072.2020.9218652 DO https://doi.org/10.1109/DAC18072.2020.9218652 SF ELIB - SuUB Bremen
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