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Hardware Accelerator Design with Supervised Machine Learnin..:

, In: 2020 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT),
Chen, J. ; Lange, T. ; Andjelkovic, M... - p. 1-6 , 2020
Link: https://doi.org/10.1109/DFT50435.2020.9250856