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1
Design of a Hardware in the Loop scheme in DC-DC converters..:
, In:
2020 IEEE International Autumn Meeting on Power, Electronics and Computing (ROPEC)
,
Cervantes, M. Heras
;
Ramirez, M.C. Garcia
;
Tellez-Anguiano, A. C
... - p. 1-6 , 2020
Link:
https://doi.org/10.1109/ROPEC50909.2020.9258691
RT T1 <cTitle>2020 IEEE International Autumn Meeting on Power, Electronics and Computing (ROPEC)</cTitle>: T1 <Title>Design of a Hardware in the Loop scheme in DC-DC converters using LabVIEW FPGA</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-9258691&Exemplar=1&LAN=DE A1 Cervantes, M. Heras A1 Ramirez, M.C. Garcia A1 Tellez-Anguiano, A. C A1 Cardenas, F. Martinez A1 Gomez, J. Correa A1 Patino, A. Mendez YR 2020 SN 2573-0770 K1 Field programmable gate arrays K1 Hardware K1 Pulse width modulation K1 Mathematical model K1 Real-time systems K1 Power electronics K1 HVDC transmission K1 Hardware in the Loop K1 Real Time Simulation K1 FPGA K1 DC-DC Converters K1 PI Control K1 PWM SP 1 OP 6 LK http://dx.doi.org/https://doi.org/10.1109/ROPEC50909.2020.9258691 DO https://doi.org/10.1109/ROPEC50909.2020.9258691 SF ELIB - SuUB Bremen
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