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1 Ergebnisse
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Reduction of Parity Overhead in a Subset of Orthogonal Lati..:
, In:
2020 XXXV Conference on Design of Circuits and Integrated Systems (DCIS)
,
Reviriego, Pedro
;
Liu, Shanshan
;
Sanchez-Macian, Alfonso
.. - p. 1-5 , 2020
Link:
https://doi.org/10.1109/DCIS51330.2020.9268637
RT T1
2020 XXXV Conference on Design of Circuits and Integrated Systems (DCIS)
: T1
Reduction of Parity Overhead in a Subset of Orthogonal Latin Square Codes
UL https://suche.suub.uni-bremen.de/peid=ieee-9268637&Exemplar=1&LAN=DE A1 Reviriego, Pedro A1 Liu, Shanshan A1 Sanchez-Macian, Alfonso A1 Xiao, Liyi A1 Maestro, Juan Antonio YR 2020 SN 2640-5563 K1 Delays K1 Decoding K1 Mathematical model K1 Error correction codes K1 Parity check codes K1 Complexity theory K1 Proposals K1 Error correcting codes K1 Latin squares K1 Double error correction K1 One-Step Majority Logic Decodable codes SP 1 OP 5 LK http://dx.doi.org/https://doi.org/10.1109/DCIS51330.2020.9268637 DO https://doi.org/10.1109/DCIS51330.2020.9268637 SF ELIB - SuUB Bremen
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